Simulink Modeling and Design of an Efficient Hardware-Constrained FPGA-Based PMSM Speed Controller.pdf (612.68 kB)
Simulink modeling and design of an efficient hardware-constrained FPGA-based PMSM speed controller
journal contribution
posted on 2023-08-30, 13:51 authored by Bogdan Alecsa, Marcian N. Cirstea, Alexandru OneaThe aim of this paper is to present a holistic approach to modeling and FPGA implementation of a permanent magnet synchronous motor (PMSM) speed controller. The whole system is modeled in the Matlab Simulink environment. The controller is then translated to discrete time and remodeled using System Generator blocks, directly synthesizable into FPGA hardware. The algorithm is further refined and factorized to take into account hardware constraints, so as to fit into a low cost FPGA, without significantly increasing the execution time. The resulting controller is then integrated together with sensor interfaces and analysis tools and implemented into an FPGA device. Experimental results validate the controller and verify the design.
History
Refereed
- Yes
Volume
8Issue number
3Page range
554-562Publication title
IEEE Transactions on Industrial InformaticsISSN
1941-0050External DOI
Publisher
IEEEFile version
- Accepted version
Language
- eng
Official URL
Legacy posted date
2013-07-18Legacy creation date
2022-01-26Legacy Faculty/School/Department
ARCHIVED Faculty of Science & Technology (until September 2018)Usage metrics
Categories
No categories selectedKeywords
Licence
Exports
RefWorks
BibTeX
Ref. manager
Endnote
DataCite
NLM
DC